Packet-based data communications systems send data packets through a network of switches in order to relay information included in the packets to a destination. Each of the switches in a network is typically capable of receiving input data from a number of different sources and providing this input data over a number of different outputs towards a number of different destinations. Such switches typically include a number of line cards that perform both reception (ingress data) and transmission (egress data) of the data packets. The line cards are often interconnected using a crossbar switch or similar mechanism such that any ingress data received on any one of the line cards can be provided as egress data on one or more of the other line cards of the switch.
When a packet is received at the ingress portion of one of the line cards, a determination as to the destination for the packet must be made, and the packet forwarded to the appropriate egress line card or line cards. In prior art solutions, portions of packets received are buffered until the entire packet has been received before any forwarding of the packet to the destination line card or line cards begins. Once the entire packet has been received, verification as to proper receipt of the packet can be performed, and then the packet is forwarded over the backplane, or switching fabric, of the switch to the one or more destination line cards for output. Because an ingress portion of a line card may receive data from a large number of connections, prior art solutions require a large amount of buffering space to store the portions of packets received via these multiple connections. Such buffering requirements add undesirable cost and complexity to systems.
Once the entire packet has been received, the packet is typically broken up into cells or other small fixed-data-length structures that are transferred across the backplane, or switching fabric, of the switch to the one or more egress line cards. Another disadvantage of prior art systems that require the receipt of the entire packet prior to forwarding is that the latency induced by such systems can significantly delay passage of the packet through the switch. For example, assume that the packet takes 20 microseconds to completely arrive within the ingress portion of the line card. Combining this arrival period with the time required to divide the packet into the fixed-length blocks for transmission across the backplane of the switch can significantly increase the total latency induced by the switch within the communication network. Such additional latency is undesirable, as it can affect overall data transmission speed.
A further disadvantage of these prior art systems that require receipt of the entire packet prior to forwarding is that the bandwidth available along the backplane of the switch is not optimally utilized. Because in prior art systems the packet is not divided into the fixed-length blocks for transmission across the backplane until the entire packet is received, these fixed-length blocks are typically provided to the backplane in quick succession. Thus, rather than spreading the bandwidth usage for transmission of a packet across a longer period of time, the bandwidth requirements for transmission of the packet grouped temporally. If receipt of a number of different packets is completed at approximately the same time, each of these packets will be attempted to be transmitted across the backplane of the switch in close temporal proximity to the others. This can cause bandwidth usage spikes on the backplane that can increase transmission delays through the switch. Additionally, this can increase the buffering requirements of the ingress portions of the line cards as it may not be possible to transmit data across the backplane as soon as the segmentation, or division into fixed-length blocks, is completed.
Therefore, a need exist for a method and apparatus for segmentation and forwarding of packets in communication switches that reduces buffering requirements and latency while improving efficiency of switch backplane bandwidth utilization.